DescriptionCourse Description In this short course we will present, review, simulate then real-time implement DSP enabled software defined radios (SDR) on Xilinx (Zynq) FPGAs with RF transceivers. The design, simulation and implementation will be a complete model based design flow with MathWork's MATLAB and Simulink software tools. The course will ensure attendees are educated in key relevant multi-rate DSP algorithms and techniques, in communications modulation methods, quadrature/QAM transceiver designs, and timing and synchronisation receivers. The first part of the course will educate on DSP and communications, followed by a second part on FPGA (focus on Xilinx Zynq) systems implementation and HDL Coder methods for SDR design. The third and final part of the course will be real-time 'desktop' implementation of SDR transceivers using a model based design flow starting with floating point design, to fixed point, and a final code generation stage featuring HDL coder for implementation on the FPGA. All attendees on the course will use (and take home!) an RTL-SDR device (tuning from 20MHz to 1.7GHz) and have access to a Zynq based SDR kit in class hosting this RTL-SDR device and wideband FMComms RF cards. The class format will be 40% lecture, 20% live SDR demonstration and 40% hands-on using software and SDR hardware. Previous successful and hands-on versions of this course were given in August 2015 at the IEEE Signal Processing and Education event in Utah, and also an IEEE Metro Workshop in October 2015 in the UK.
|Period||10 Oct 2016 → 12 Oct 2016|
|Location||Los Angeles, United States|
- software defined radio
- digital signal processing
- field programmable gate array
Documents & Links
Research output: Book/Report › Book